A foundry based Bipolar-CMOS-DMOS (BCD) technology typically includes a full suite of devices having a wide range of operation voltages. For example, in a 180 nm BCD platform, operation voltages such as 1.8V, 5V, 10V, 12V, 16V, 20V, 24V and 30V are provided to satisfy different applications in automotive, audio, display, etc.
Depending on the BCD operation platforms, the various devices are typically categorized according to their operational voltage. By way of an example, devices operate in the relatively higher voltage range, e.g., 24V and above, may be referred to as the high voltage (HV) devices. Such HV devices include laterally diffused metal oxide semiconductor (LDMOS) transistors. Devices operate in the relatively lower voltage range, e.g., low as 1.8V/5V, may be referred to as the low voltage (LV) devices, such as the complementary metal-oxide-semiconductor (CMOS) transistors. Devices which fall between the higher and lower voltage ranges may be referred to as the intermediate/medium voltage (MV) devices, e.g., 10V to 20V. An example of the MV devices is the extended drain MOS (EDMOS) transistor.
Two types of doped wells, namely the LV doped well and HV doped well, are usually provided for the devices, taking into considerations of the cost effectiveness. Typically, performance of the HV and LV devices can be directly optimized by utilizing the aforementioned doped wells. For example, a HV doped well is typically provided for optimizing the performance of HV devices and a LV doped well for the LV devices. However, optimizing MV devices can only be relied on the device structure designs.
The present disclosure provides a structure design which optimizes the performance of a MV device and a method for forming such a MV device.